Fix context switch.

kernel/src/arch/mipsel/boot/context.S

@@ -3,7 +3,7 @@
 .set noat
 .set noreorder
 
-// .section .text.context
+.section .text.context
 .globl switch_context
 .extern root_page_table_ptr
 

kernel/src/arch/mipsel/boot/dtb.S

@@ -0,0 +1,10 @@
+# generated by build.rs - do not edit
+.intel_syntax noprefix
+
+    .section .dtb,"a"
+    .align 12
+    .global _dtb_start, _dtb_end
+_dtb_start:
+    .incbin "src/arch/mipsel/board/malta/device.dtb"
+_dtb_end:
+    

kernel/src/arch/mipsel/context.rs

@@ -159,7 +159,11 @@ impl Context {
     #[naked]
     #[inline(never)]
     pub unsafe extern fn switch(&mut self, _target: &mut Self) {
-        asm!(include_str!("boot/context.gen.s"));
+        extern {
+            fn switch_context(src : &mut Context, dst : &mut Context);
+        }
+
+        switch_context(self, _target);
     }
 
     /// Constructs a null Context for the current running thread.

kernel/src/arch/mipsel/mod.rs

@@ -74,6 +74,7 @@ fn others_main() -> ! {
 
 const BOOT_CPU_ID: u32 = 0;
 
+global_asm!(include_str!("boot/context.gen.s"));
 global_asm!(include_str!("boot/entry.gen.s"));
 global_asm!(include_str!("boot/trap.gen.s"));
 global_asm!(include_str!("boot/dtb.gen.s"));

kernel/src/backtrace.rs

@@ -24,7 +24,8 @@ pub fn fp() -> usize {
     }
     #[cfg(any(target_arch = "mips"))]
     unsafe {
-        asm!("mov $0, fp" : "=r"(ptr));
+        // fp = $30
+        asm!("ori $0, $$$30, 0" : "=r"(ptr));
     }
 
     ptr
@@ -39,8 +40,7 @@ pub fn lr() -> usize {
         asm!("mov $0, x30" : "=r"(ptr));
     }
     #[cfg(any(target_arch = "riscv32",
-              target_arch = "riscv64",
+              target_arch = "riscv64"))]
-              target_arch = "mips"))]
     unsafe {
         asm!("mv $0, ra" : "=r"(ptr));
     }
@@ -49,6 +49,11 @@ pub fn lr() -> usize {
         asm!("movq 8(%rbp), $0" : "=r"(ptr));
     }
 
+    #[cfg(target_arch = "mips")]
+    unsafe {
+        asm!("ori $0, $$$31, 0" : "=r"(ptr));
+    }
+
     ptr
 }