|  |  | @ -12,13 +12,14 @@ use spin::Mutex; | 
			
		
	
		
		
			
				
					
					|  |  |  | pub fn init(ioapic_id: u8) |  |  |  | pub fn init(ioapic_id: u8) | 
			
		
	
		
		
			
				
					
					|  |  |  | { |  |  |  | { | 
			
		
	
		
		
			
				
					
					|  |  |  | 	let mut ioapic = IOAPIC.lock(); |  |  |  | 	let mut ioapic = IOAPIC.lock(); | 
			
		
	
		
		
			
				
					
					|  |  |  | 	assert!(ioapic.id() == ioapic_id, "ioapicinit: id isn't equal to ioapicid; not a MP"); |  |  |  | 	assert!(ioapic.id() == ioapic_id, "ioapic.init: id isn't equal to ioapicid; not a MP"); | 
			
				
				
			
		
	
		
		
	
		
		
			
				
					
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					|  |  |  | 	// Mark all interrupts edge-triggered, active high, disabled,
 |  |  |  | 	// Mark all interrupts edge-triggered, active high, disabled,
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					|  |  |  | 	// and not routed to any CPUs.
 |  |  |  | 	// and not routed to any CPUs.
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					|  |  |  | 	for i in 0.. ioapic.maxintr() + 1 { |  |  |  | 	for i in 0.. ioapic.maxintr() + 1 { | 
			
		
	
		
		
			
				
					
					|  |  |  | 		ioapic.write_irq(i, DISABLED, 0); |  |  |  | 		ioapic.write_irq(i, DISABLED, 0); | 
			
		
	
		
		
			
				
					
					|  |  |  | 	} |  |  |  | 	} | 
			
		
	
		
		
			
				
					
					|  |  |  |  |  |  |  | 	debug!("ioapic: init end"); | 
			
		
	
		
		
			
				
					
					|  |  |  | } |  |  |  | } | 
			
		
	
		
		
			
				
					
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					|  |  |  | const IOAPIC_ADDRESS  : u32 = 0xFEC00000;   // Default physical address of IO APIC
 |  |  |  | const IOAPIC_ADDRESS  : u32 = 0xFEC00000;   // Default physical address of IO APIC
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					|  |  | @ -80,6 +81,7 @@ impl IoApic { | 
			
		
	
		
		
			
				
					
					|  |  |  | 	} |  |  |  | 	} | 
			
		
	
		
		
			
				
					
					|  |  |  | 	pub fn enable(&mut self, irq: u8, cpunum: u8) |  |  |  | 	pub fn enable(&mut self, irq: u8, cpunum: u8) | 
			
		
	
		
		
			
				
					
					|  |  |  | 	{ |  |  |  | 	{ | 
			
		
	
		
		
			
				
					
					|  |  |  |  |  |  |  | 		debug!("ioapic: enable irq {} @ cpu{}", irq, cpunum); | 
			
		
	
		
		
			
				
					
					|  |  |  | 		// Mark interrupt edge-triggered, active high,
 |  |  |  | 		// Mark interrupt edge-triggered, active high,
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					|  |  |  | 		// enabled, and routed to the given cpunum,
 |  |  |  | 		// enabled, and routed to the given cpunum,
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					|  |  |  | 		// which happens to be that cpu's APIC ID.
 |  |  |  | 		// which happens to be that cpu's APIC ID.
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