fix context change bug. user sh is running!!!

master
dzy 6 years ago
parent 6f2d059ba5
commit e74f749ff3

@ -25,7 +25,7 @@ if [[ ${RV32} = 1 ]]; then
UCORE_USER_IMAGE="../user/img/ucore-rv32.img"
else
TARGET_ARCH=riscv64
export LOG=trace
export LOG=warn
COMPILER_RT_CFLAGS="-march=rv64ia -mabi=lp64 -O3"
SFSIMG_CFLAGS="-march=rv64ia -mabi=lp64"
RISCV_PK_CONFIGURE_FLAGS="--with-arch=rv64imac --disable-fp-emulation --host=riscv64-unknown-elf"

@ -153,6 +153,7 @@ impl Context {
/// Push all callee-saved registers at the current kernel stack.
/// Store current sp, switch to target.
/// Pop all callee-saved registers, then return to the target.
#[cfg(target_arch = "riscv32")]
#[naked]
#[inline(never)]
pub unsafe extern fn switch(&mut self, target: &mut Self) {
@ -201,6 +202,55 @@ impl Context {
: : : : "volatile" )
}
#[cfg(target_arch = "riscv64")]
#[naked]
#[inline(never)]
pub unsafe extern fn switch(&mut self, target: &mut Self) {
asm!(
"
// save from's registers
addi sp, sp, -8*14
sd sp, 0(a0)
sd ra, 0*8(sp)
sd s0, 2*8(sp)
sd s1, 3*8(sp)
sd s2, 4*8(sp)
sd s3, 5*8(sp)
sd s4, 6*8(sp)
sd s5, 7*8(sp)
sd s6, 8*8(sp)
sd s7, 9*8(sp)
sd s8, 10*8(sp)
sd s9, 11*8(sp)
sd s10, 12*8(sp)
sd s11, 13*8(sp)
csrrs s11, 0x180, x0 // satp
sd s11, 1*8(sp)
// restore to's registers
ld sp, 0(a1)
ld s11, 1*8(sp)
csrrw x0, 0x180, s11 // satp
ld ra, 0*8(sp)
ld s0, 2*8(sp)
ld s1, 3*8(sp)
ld s2, 4*8(sp)
ld s3, 5*8(sp)
ld s4, 6*8(sp)
ld s5, 7*8(sp)
ld s6, 8*8(sp)
ld s7, 9*8(sp)
ld s8, 10*8(sp)
ld s9, 11*8(sp)
ld s10, 12*8(sp)
ld s11, 13*8(sp)
addi sp, sp, 8*14
sd zero, 0(a1)
ret"
: : : : "volatile" )
}
/*
* @brief:
* generate a null Context
@ -274,4 +324,4 @@ impl Context {
pub unsafe fn get_init_tf(&self) -> TrapFrame {
(*(self.0 as *const InitStack)).tf.clone()
}
}
}

@ -66,4 +66,4 @@ pub fn set_next() {
extern "C" {
fn clint_timer_init() -> i32;
fn clint_timer_start(interval_ms: u64, single_shot: bool) -> i32;
}
}

Loading…
Cancel
Save