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@ -15,6 +15,7 @@ use volatile::{ReadOnly, Volatile, WriteOnly};
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use crate::arch::memory;
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use crate::HEAP_ALLOCATOR;
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use crate::memory::active_table;
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use crate::arch::consts::{KERN_VA_BASE, MEMORY_OFFSET};
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use super::super::block::virtio_blk;
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use super::super::gpu::virtio_gpu;
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@ -96,7 +97,7 @@ impl VirtIOVirtqueue {
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header.queue_num.write(queue_num as u32);
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header.queue_align.write(align as u32);
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header.queue_pfn.write((address as u32) >> 12);
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header.queue_pfn.write(((address - KERN_VA_BASE + MEMORY_OFFSET) as u32) >> 12);
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// link desc together
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let desc = unsafe { slice::from_raw_parts_mut(address as *mut VirtIOVirtqueueDesc, queue_num) };
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@ -139,14 +140,14 @@ impl VirtIOVirtqueue {
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let mut cur = self.free_head;
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for i in 0..output.len() {
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desc[cur].flags.write(VirtIOVirtqueueFlag::NEXT.bits());
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desc[cur].addr.write(output[i].as_ptr() as u64);
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desc[cur].addr.write(output[i].as_ptr() as u64 - KERN_VA_BASE as u64 + MEMORY_OFFSET as u64);
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desc[cur].len.write(output[i].len() as u32);
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prev = cur;
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cur = desc[cur].next.read() as usize;
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}
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for i in 0..input.len() {
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desc[cur].flags.write((VirtIOVirtqueueFlag::NEXT | VirtIOVirtqueueFlag::WRITE).bits());
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desc[cur].addr.write(input[i].as_ptr() as u64);
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desc[cur].addr.write(input[i].as_ptr() as u64 - KERN_VA_BASE as u64 + MEMORY_OFFSET as u64);
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desc[cur].len.write(input[i].len() as u32);
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prev = cur;
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cur = desc[cur].next.read() as usize;
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