You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

71 lines
2.4 KiB

# Copyright (c) 2015 - present Facebook, Inc.
# All rights reserved.
#
# This source code is licensed under the BSD style license found in the
# LICENSE file in the root directory of this source tree. An additional grant
# of patent rights can be found in the PATENTS file in the same directory.
ROOT_DIR = ../..
include $(ROOT_DIR)/Makefile.config
C_MODELS_DIR = c
CPP_MODELS_DIR = cpp
JAVA_MODELS_DIR = java
OBJC_MODELS_DIR = objc
CLANG_MODELS_FILE = $(SPECS_LIB_DIR)/clang_models
CLANG_SUBDIRS = $(C_MODELS_DIR) $(CPP_MODELS_DIR)
move all config variables to Makefile.config.in Summary: Hardcoding `variable@` in Makefiles is Bad™ because it prevents the users from overwriting them easily with `make variable="my custom value"`. The right way to do it is thus: ``` variable = variable@ # then use $(variable) everywhere ``` This diff puts all the `variable = variable@` lines in Makefile.config.in, and changes every occurrence of a `variable@` to `$(variable)` everywhere else. I mostly automated generating this diff. Here are the steps I did: - find out which `variable@`s we use: find . -name 'Makefile*' -exec grep -e '@[^@ []\+@' -o -h \{\} \+ | sort | uniq > config_variables - write this `replace.sh` script to replace every `variable@` with `$(variable)`: ``` #!/bin/sh config_vars_file=$1 shift for line in $(cat $config_vars_file); do var=$(echo $line | tr -d @) sed -i -e "s/$line/\$($var)/g" $@ > /dev/null done ``` - run the script as such: find . -name 'Makefile.*in' \( -not -wholename './Makefile.config.in' \) -exec ./replace.sh config_variables \{\} \+ - put all the `VARIABLE = VARIABLE@` lines in Makefile.config.in - move all `Makefile.in` to `Makefile`, since they don't need to be generated by `./configure` anymore: ``` for i in $(find . -name 'Makefile.*in' \( -not -wholename './Makefile.config.in' \)); do \ rm $(dirname $i)/$(basename $i .in) && git mv $i $(dirname $i)/$(basename $i .in) ; \ done ``` - delete all Makefile except Makefile.config from configure.ac - manually inspect and remove remaining instances of `VAR = $(VAR)` in makefiles, looking at the output of `git grep '^\(\w\+\) = $(\1)'` Reviewed By: jberdine Differential Revision: D3358379 fbshipit-source-id: 5d37f02
9 years ago
ifneq (no, $(XCODE_SELECT))
CLANG_SUBDIRS += $(OBJC_MODELS_DIR)
endif
all:
move all config variables to Makefile.config.in Summary: Hardcoding `variable@` in Makefiles is Bad™ because it prevents the users from overwriting them easily with `make variable="my custom value"`. The right way to do it is thus: ``` variable = variable@ # then use $(variable) everywhere ``` This diff puts all the `variable = variable@` lines in Makefile.config.in, and changes every occurrence of a `variable@` to `$(variable)` everywhere else. I mostly automated generating this diff. Here are the steps I did: - find out which `variable@`s we use: find . -name 'Makefile*' -exec grep -e '@[^@ []\+@' -o -h \{\} \+ | sort | uniq > config_variables - write this `replace.sh` script to replace every `variable@` with `$(variable)`: ``` #!/bin/sh config_vars_file=$1 shift for line in $(cat $config_vars_file); do var=$(echo $line | tr -d @) sed -i -e "s/$line/\$($var)/g" $@ > /dev/null done ``` - run the script as such: find . -name 'Makefile.*in' \( -not -wholename './Makefile.config.in' \) -exec ./replace.sh config_variables \{\} \+ - put all the `VARIABLE = VARIABLE@` lines in Makefile.config.in - move all `Makefile.in` to `Makefile`, since they don't need to be generated by `./configure` anymore: ``` for i in $(find . -name 'Makefile.*in' \( -not -wholename './Makefile.config.in' \)); do \ rm $(dirname $i)/$(basename $i .in) && git mv $i $(dirname $i)/$(basename $i .in) ; \ done ``` - delete all Makefile except Makefile.config from configure.ac - manually inspect and remove remaining instances of `VAR = $(VAR)` in makefiles, looking at the output of `git grep '^\(\w\+\) = $(\1)'` Reviewed By: jberdine Differential Revision: D3358379 fbshipit-source-id: 5d37f02
9 years ago
ifeq ($(BUILD_C_ANALYZERS),yes)
all: clang
endif
move all config variables to Makefile.config.in Summary: Hardcoding `variable@` in Makefiles is Bad™ because it prevents the users from overwriting them easily with `make variable="my custom value"`. The right way to do it is thus: ``` variable = variable@ # then use $(variable) everywhere ``` This diff puts all the `variable = variable@` lines in Makefile.config.in, and changes every occurrence of a `variable@` to `$(variable)` everywhere else. I mostly automated generating this diff. Here are the steps I did: - find out which `variable@`s we use: find . -name 'Makefile*' -exec grep -e '@[^@ []\+@' -o -h \{\} \+ | sort | uniq > config_variables - write this `replace.sh` script to replace every `variable@` with `$(variable)`: ``` #!/bin/sh config_vars_file=$1 shift for line in $(cat $config_vars_file); do var=$(echo $line | tr -d @) sed -i -e "s/$line/\$($var)/g" $@ > /dev/null done ``` - run the script as such: find . -name 'Makefile.*in' \( -not -wholename './Makefile.config.in' \) -exec ./replace.sh config_variables \{\} \+ - put all the `VARIABLE = VARIABLE@` lines in Makefile.config.in - move all `Makefile.in` to `Makefile`, since they don't need to be generated by `./configure` anymore: ``` for i in $(find . -name 'Makefile.*in' \( -not -wholename './Makefile.config.in' \)); do \ rm $(dirname $i)/$(basename $i .in) && git mv $i $(dirname $i)/$(basename $i .in) ; \ done ``` - delete all Makefile except Makefile.config from configure.ac - manually inspect and remove remaining instances of `VAR = $(VAR)` in makefiles, looking at the output of `git grep '^\(\w\+\) = $(\1)'` Reviewed By: jberdine Differential Revision: D3358379 fbshipit-source-id: 5d37f02
9 years ago
ifeq ($(BUILD_JAVA_ANALYZERS),yes)
all: java
endif
.PHONY: java clang clean clean_specs $(CLANG_SUBDIRS)
clean_specs:
$(REMOVE) $(SPECS_LIB_DIR)/*.specs $(C_MODELS_FILE) $(CPP_MODELS_FILE) $(OBJC_MODELS_FILE)
$(CLANG_SUBDIRS):
$(QUIET)$(MAKE) -C $@ out/report.json
# The clang deps have changed, so the models need to be rebuilt. If infer itself has changed, we
# need to nuke the previous specs files in case the serialization has changed, otherwise we might
# encounter a segfault reading them.
$(CLANG_MODELS_FILE): $(CLANG_DEPS_NO_MODELS)
$(QUIET)$(MAKE) clean_specs
# Since [CLANG_DEPS_NO_MODELS] is newer than [CLANG_MODELS_FILE], it is also newer than the
# previously built clang models, so they will all be rebuilt by the subdirs' Makefiles.
$(QUIET)$(MAKE) $(CLANG_SUBDIRS)
# Run the installs sequentially as the models shared some of the C procedures. This can cause
# race conditions when copying specs files inside lib/specs/
$(QUIET)for clang_dir in $(CLANG_SUBDIRS); do $(MAKE) -C "$$clang_dir" install; done
# Maintain the invariant that [CLANG_MODELS_FILE] is newer than the clang models.
$(QUIET)touch $@
clang: $(CLANG_MODELS_FILE)
# Run the sub-makes unconditionally since they know more about when they need to be
# rebuilt. For instance, they need to be rebuilt when their source files change, which is not
# taken into account by the dependencies of the $(CLANG_MODELS_FILE) target. If we rebuilt
# $(CLANG_MODELS_FILE) already, then the command below will be a no-op (so we don't rebuild
# the models twice).
$(QUIET)$(MAKE) $(CLANG_SUBDIRS)
java:
$(QUIET)$(MAKE) -C $@ install
clean: clean_specs
$(QUIET)$(MAKE) -C $(JAVA_MODELS_DIR) clean
$(QUIET)$(MAKE) -C $(C_MODELS_DIR) clean
$(QUIET)$(MAKE) -C $(CPP_MODELS_DIR) clean
move all config variables to Makefile.config.in Summary: Hardcoding `variable@` in Makefiles is Bad™ because it prevents the users from overwriting them easily with `make variable="my custom value"`. The right way to do it is thus: ``` variable = variable@ # then use $(variable) everywhere ``` This diff puts all the `variable = variable@` lines in Makefile.config.in, and changes every occurrence of a `variable@` to `$(variable)` everywhere else. I mostly automated generating this diff. Here are the steps I did: - find out which `variable@`s we use: find . -name 'Makefile*' -exec grep -e '@[^@ []\+@' -o -h \{\} \+ | sort | uniq > config_variables - write this `replace.sh` script to replace every `variable@` with `$(variable)`: ``` #!/bin/sh config_vars_file=$1 shift for line in $(cat $config_vars_file); do var=$(echo $line | tr -d @) sed -i -e "s/$line/\$($var)/g" $@ > /dev/null done ``` - run the script as such: find . -name 'Makefile.*in' \( -not -wholename './Makefile.config.in' \) -exec ./replace.sh config_variables \{\} \+ - put all the `VARIABLE = VARIABLE@` lines in Makefile.config.in - move all `Makefile.in` to `Makefile`, since they don't need to be generated by `./configure` anymore: ``` for i in $(find . -name 'Makefile.*in' \( -not -wholename './Makefile.config.in' \)); do \ rm $(dirname $i)/$(basename $i .in) && git mv $i $(dirname $i)/$(basename $i .in) ; \ done ``` - delete all Makefile except Makefile.config from configure.ac - manually inspect and remove remaining instances of `VAR = $(VAR)` in makefiles, looking at the output of `git grep '^\(\w\+\) = $(\1)'` Reviewed By: jberdine Differential Revision: D3358379 fbshipit-source-id: 5d37f02
9 years ago
ifneq (no, $(XCODE_SELECT))
$(QUIET)$(MAKE) -C $(OBJC_MODELS_DIR) clean
endif