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42 lines
2.1 KiB
42 lines
2.1 KiB
3 years ago
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`timescale 1ns / 1ps
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// 算数逻辑单元
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module alu #(
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parameter DATA_WIDTH = 32,
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parameter OPCODE_LENGTH = 4
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)(
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input logic[DATA_WIDTH - 1 : 0] operand_a,
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input logic[DATA_WIDTH - 1 : 0] operand_b,
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input logic[OPCODE_LENGTH - 1 : 0] alu_ctrl, // Operation
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output logic[DATA_WIDTH - 1 : 0] alu_result,
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output logic zero
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);
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// add your code here.
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logic [31:0] s;
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logic signed [31:0] signed_s, signed_operand_a, signed_operand_b;
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assign signed_operand_a = $signed(operand_a);
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assign signed_operand_b = $signed(operand_b);
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assign signed_s = $signed(signed_operand_a - signed_operand_b);
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assign s = operand_a - operand_b;
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assign zero = (s == 32'b0)? 1'b1 : 1'b0;
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always_comb
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case (alu_ctrl)
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4'b0000: alu_result = operand_a + operand_b; // add, jalr
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4'b0001: alu_result = operand_a - operand_b; // sub
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4'b0010: alu_result = operand_a | operand_b; // or
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4'b0011: alu_result = operand_a & operand_b; // and
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4'b0100: alu_result = {31'b0, signed_s[31]}; // slt
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4'b0101: alu_result = (operand_a == operand_b)? 32'b1 : 32'b0; // beq
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4'b0110: alu_result = (operand_a != operand_b)? 32'b1 : 32'b0; // bne
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4'b0111: alu_result = (signed_operand_a < signed_operand_b)? 32'b1 : 32'b0; // blt
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4'b1000: alu_result = (signed_operand_a >= signed_operand_b)? 32'b1 : 32'b0; // bge
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4'b1001: alu_result = (operand_a < operand_b)? 32'b1 : 32'b0; // bltu
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4'b1010: alu_result = (operand_a >= operand_b)? 32'b1 : 32'b0; // bgeu
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4'b1011: alu_result = 32'b1; // jal
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4'b1100: alu_result = operand_a ^ operand_b; // xor
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default: alu_result = 32'b0;
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endcase
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endmodule
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