Shard
郑几方 3 years ago
parent b93aa5abb5
commit bb2fae9bb4

@ -1,4 +1,6 @@
import binandint
def alu(a, b, alu_ctrl): # a,b为两个运算数alu_ctrl为控制信号返回运算结果result与是否为0 zero
if alu_ctrl == '00000':
pass

@ -1,4 +1,5 @@
def alu_controller(alu_op,funct7,funct3): #alu_op来自主控制器funct7和funct3来自指令的特定部位 返回alu_ctrl
def alu_controller(alu_op, funct7,
funct3): # alu_op来自主控制器funct7和funct3来自指令的特定部位 返回alu_ctrl
if alu_op == '00':
opreation = '00000' # lw.sw.auipc
elif alu_op == '01':

@ -1,4 +1,5 @@
def branch_unit(cur_pc,imm,jalr_sel,branch_taken,alu_result): #输入值为当前pcint立即数jalr信号是否跳转信号alu运算结果(全是int型)
def branch_unit(cur_pc, imm, jalr_sel, branch_taken,
alu_result): # 输入值为当前pcint立即数jalr信号是否跳转信号alu运算结果(全是int型)
pc_plus_4 = cur_pc + 4 # 输出为pc_plus_imm,pc_plus_4,branch_target,pc_sel(忘了这是啥了,需要回头再看)
pc_plus_imm = cur_pc + imm
pc_sel = jalr_sel | (branch_taken & (alu_result % 2))

@ -1,6 +1,8 @@
class data_mem:
memory = [8 * '0'] * 4 * 1024 * 16
def mem(self,write_en,read_en,address,data_in,funct3): #写使能,读使能,(使能为int的0或1)地址输入数据func3 #输出为data_out
def mem(self, write_en, read_en, address, data_in, funct3
): # 写使能,读使能,(使能为int的0或1)地址输入数据func3 # 输出为data_out
if write_en:
if funct3 == '000':
pass

@ -1,4 +1,5 @@
def fowardingunit(rs1,rs2,ex_mem_rd,mem_wb_rd,ex_mem_regwrite,mem_wb_regwrite):
def fowardingunit(rs1, rs2, ex_mem_rd, mem_wb_rd, ex_mem_regwrite,
mem_wb_regwrite):
if rs1 != 0 and rs1 == ex_mem_rd and ex_mem_regwrite:
forward_a = '01'
elif rs1 != 0 and rs1 == mem_wb_rd and mem_wb_regwrite:

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