|
|
|
|
@ -342,8 +342,20 @@ namespace mir
|
|
|
|
|
scalar_slots, array_slots, block);
|
|
|
|
|
int rhs = EmitIntValue(bin->GetRhs(), function, value_vregs,
|
|
|
|
|
scalar_slots, array_slots, block);
|
|
|
|
|
block.Append(Opcode::CmpRR,
|
|
|
|
|
{Operand::VReg(lhs, VRegClass::Int), Operand::VReg(rhs, VRegClass::Int)});
|
|
|
|
|
|
|
|
|
|
// 立即数折叠:常量 rhs 直接用 CmpImm
|
|
|
|
|
int cmp_imm = 0;
|
|
|
|
|
if (TryGetConstantInt(bin->GetRhs(), cmp_imm) && static_cast<unsigned int>(cmp_imm) <= 4095)
|
|
|
|
|
{
|
|
|
|
|
block.Append(Opcode::CmpImm,
|
|
|
|
|
{Operand::VReg(lhs, VRegClass::Int),
|
|
|
|
|
Operand::Imm(cmp_imm)});
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
block.Append(Opcode::CmpRR,
|
|
|
|
|
{Operand::VReg(lhs, VRegClass::Int), Operand::VReg(rhs, VRegClass::Int)});
|
|
|
|
|
}
|
|
|
|
|
int dst = function.CreateVReg(VRegClass::Int);
|
|
|
|
|
block.Append(Opcode::CSet,
|
|
|
|
|
{Operand::VReg(dst, VRegClass::Int),
|
|
|
|
|
@ -650,6 +662,23 @@ namespace mir
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// 立即数折叠:AddRR/SubRR 的操作数 2 如果是常量且 <=4095,直接用 Imm
|
|
|
|
|
int imm_val = 0;
|
|
|
|
|
if ((opcode == Opcode::AddRR || opcode == Opcode::SubRR) &&
|
|
|
|
|
TryGetConstantInt(bin->GetRhs(), imm_val))
|
|
|
|
|
{
|
|
|
|
|
int abs_val = imm_val >= 0 ? imm_val : -imm_val;
|
|
|
|
|
if (abs_val <= 4095)
|
|
|
|
|
{
|
|
|
|
|
block.Append(opcode,
|
|
|
|
|
{Operand::VReg(dst, VRegClass::Int),
|
|
|
|
|
Operand::VReg(lhs, VRegClass::Int),
|
|
|
|
|
Operand::Imm(imm_val)});
|
|
|
|
|
value_vregs[value] = dst;
|
|
|
|
|
return dst;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
block.Append(opcode,
|
|
|
|
|
{Operand::VReg(dst, VRegClass::Int),
|
|
|
|
|
Operand::VReg(lhs, VRegClass::Int),
|
|
|
|
|
|