Fix return register in sys_clone.

toolchain_update
Yuhao Zhou 6 years ago
parent a57a22a26b
commit b6aa9858d3

2
kernel/Cargo.lock generated

@ -230,7 +230,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
[[package]]
name = "mips"
version = "0.1.0"
source = "git+https://github.com/Harry-Chen/rust-mips#1f3df9589869670621baa863b87a3444d80f08a6"
source = "git+https://github.com/Harry-Chen/rust-mips#7410a6aa107fce681378e7850c03f9b6befec2d2"
dependencies = [
"bit_field 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)",
"bitflags 1.0.4 (registry+https://github.com/rust-lang/crates.io-index)",

@ -1,4 +1,5 @@
use mips::registers::cp0;
use mips::tlb;
/// Saved registers on a trap.
#[derive(Clone)]
@ -226,8 +227,8 @@ impl Context {
tf: {
let mut tf = tf.clone();
tf.sp = ustack_top; // sp
tf.v1 = tls; // tp
tf.v0 = 0; // a0
tf.v1 = tls;
tf.a0 = 0; // return value
tf
},
}.push_at(kstack_top)

@ -155,7 +155,12 @@ fn page_fault(tf: &mut TrapFrame) {
};
let tlb_result = root_table.lookup(addr);
match tlb_result {
Ok(tlb_entry) => tlb::write_tlb_random(tlb_entry),
Ok(tlb_entry) => {
trace!("PhysAddr = {:x}/{:x}",
tlb_entry.entry_lo0.get_pfn() << 12,
tlb_entry.entry_lo1.get_pfn() << 12);
tlb::write_tlb_random(tlb_entry)
},
Err(()) => {
if !crate::memory::handle_page_fault(addr) {
crate::trap::error(tf);

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