Harry Chen
6 years ago
parent
b1e7a2d07e
commit
60bc1a54d2
@ -1,3 +1,4 @@
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build/
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target/
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.DS_Store
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.vscode
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@ -0,0 +1,32 @@
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{
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"arch": "mips",
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"cpu": "mips32r2",
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"llvm-target": "mipsel-unknown-none",
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"data-layout": "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64",
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"target-endian": "little",
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"target-pointer-width": "32",
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"target-c-int-width": "32",
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"os": "none",
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"features": "+mips32r2,+soft-float",
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"max-atomic-width": "32",
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"linker": "rust-lld",
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"linker-flavor": "ld.lld",
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"executables": true,
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"panic-strategy": "abort",
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"relocation-model": "static",
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"abi-blacklist": [
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"cdecl",
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"stdcall",
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"fastcall",
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"vectorcall",
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"thiscall",
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"aapcs",
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"win64",
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"sysv64",
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"ptx-kernel",
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"msp430-interrupt",
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"x86-interrupt"
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],
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"eliminate-frame-pointer": false
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}
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@ -0,0 +1,14 @@
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// See LICENSE for license details.
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#ifndef __LIBS_MIPSEL_H__
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#define __LIBS_MIPSEL_H__
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#define do_div(n, base) \
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({ \
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int __res; \
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__res = ((unsigned long)n) % (unsigned)base; \
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n = ((unsigned long)n) / (unsigned)base; \
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__res; \
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})
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#endif
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@ -0,0 +1,75 @@
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#ifndef __LIBS_ATOMIC_H__
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#define __LIBS_ATOMIC_H__
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// TODO: implement atomic operations for aarch64
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/* Atomic operations that C can't guarantee us. Useful for resource counting etc.. */
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static inline void set_bit(int nr, volatile void *addr) __attribute__((always_inline));
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static inline void clear_bit(int nr, volatile void *addr) __attribute__((always_inline));
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static inline void change_bit(int nr, volatile void *addr) __attribute__((always_inline));
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static inline bool test_and_set_bit(int nr, volatile void *addr) __attribute__((always_inline));
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static inline bool test_and_clear_bit(int nr, volatile void *addr) __attribute__((always_inline));
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static inline bool test_bit(int nr, volatile void *addr) __attribute__((always_inline));
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/* *
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* set_bit - Atomically set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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* */
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static inline void set_bit(int nr, volatile void *addr) {
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/* unimplemented */
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}
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/* *
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* clear_bit - Atomically clears a bit in memory
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* @nr: the bit to clear
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* @addr: the address to start counting from
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* */
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static inline void clear_bit(int nr, volatile void *addr) {
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/* unimplemented */
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}
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/* *
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* change_bit - Atomically toggle a bit in memory
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* @nr: the bit to change
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* @addr: the address to start counting from
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* */
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static inline void change_bit(int nr, volatile void *addr) {
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/* unimplemented */
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}
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/* *
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* test_bit - Determine whether a bit is set
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* @nr: the bit to test
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* @addr: the address to count from
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* */
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static inline bool test_bit(int nr, volatile void *addr) {
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/* unimplemented */
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return 0;
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}
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/* *
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* test_and_set_bit - Atomically set a bit and return its old value
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* @nr: the bit to set
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* @addr: the address to count from
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* */
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static inline bool test_and_set_bit(int nr, volatile void *addr) {
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/* unimplemented */
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return 0;
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}
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/* *
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* test_and_clear_bit - Atomically clear a bit and return its old value
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* @nr: the bit to clear
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* @addr: the address to count from
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* */
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static inline bool test_and_clear_bit(int nr, volatile void *addr) {
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/* unimplemented */
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return 0;
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}
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#endif /* !__LIBS_ATOMIC_H__ */
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@ -0,0 +1,10 @@
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#include <regdef.h>
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.text
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.globl _start
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_start:
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# call user-program function
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lw a0, 0(sp)
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addiu a1, sp, 8
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b umain
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nop
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@ -0,0 +1,55 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1985 MIPS Computer Systems, Inc.
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* Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle
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* Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
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*/
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#ifndef _ASM_REGDEF_H
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#define _ASM_REGDEF_H
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/*
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* Symbolic register names for 32 bit ABI
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*/
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#define zero $0 /* wired zero */
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#define AT $1 /* assembler temp - uppercase because of ".set at" */
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#define v0 $2 /* return value */
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#define v1 $3
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#define a0 $4 /* argument registers */
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#define a1 $5
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#define a2 $6
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#define a3 $7
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#define t0 $8 /* caller saved */
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#define t1 $9
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#define t2 $10
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#define t3 $11
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#define t4 $12
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#define t5 $13
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#define t6 $14
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#define t7 $15
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#define s0 $16 /* callee saved */
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#define s1 $17
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#define s2 $18
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#define s3 $19
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#define s4 $20
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#define s5 $21
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#define s6 $22
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#define s7 $23
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#define t8 $24 /* caller saved */
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#define t9 $25
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#define jp $25 /* PIC jump register */
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#define k0 $26 /* kernel scratch */
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#define k1 $27
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#define gp $28 /* global pointer */
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#define sp $29 /* stack pointer */
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#define fp $30 /* frame pointer */
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#define s8 $30 /* same like fp! */
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#define ra $31 /* return address */
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#endif /* _ASM_REGDEF_H */
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