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@ -22,6 +22,7 @@ const PCIM_CMD_MEMEN: u32 = 0x0002;
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fn pci_read_config(pci_base: usize, bus: u8, slot: u8, func: u8, offset: u8) -> u32 {
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// write config address
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let address = (1 << 31) | ((bus as u32) << 16) | ((slot as u32) << 11) | ((func as u32) << 8) | (offset as u32);
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println!("Address: {:08x}", address);
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write(pci_base + 0xcf8, address);
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// do the actual work
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read(pci_base + 0xcfc)
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@ -38,9 +39,14 @@ fn pci_write_config(pci_base: usize, bus: u8, slot: u8, func: u8, offset: u8, va
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pub fn init(pci_base: usize, vga_base: usize, x_res: u16, y_res: u16) {
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// enable PCI MMIO
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let pci_vendor = pci_read_config(pci_base, 0x00, 0x12, 0x00, 0x0);
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println!("PCI Device ID: {:08x}", pci_vendor);
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let pci_state = pci_read_config(pci_base, 0x00, 0x12, 0x00, PCIR_COMMAND);
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println!("PCI Config Status: {:08x}", pci_state);
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pci_write_config(pci_base, 0x00, 0x12, 0x00, PCIR_COMMAND, pci_state | PCIM_CMD_PORTEN | PCIM_CMD_MEMEN);
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// vga operations
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let vga_write_io = |offset: u16, value: u8| {
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write(vga_base + VGA_MMIO_OFFSET + (offset as usize), value);
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@ -61,8 +67,9 @@ pub fn init(pci_base: usize, vga_base: usize, x_res: u16, y_res: u16) {
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vga_write_vbe(VBE_DISPI_INDEX_YRES, y_res);
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vga_write_vbe(VBE_DISPI_INDEX_BPP, 8);
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// enable vbe
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let vbe_enable = vga_read_vbe(VBE_DISPI_INDEX_ENABLE) | VBE_DISPI_ENABLED;
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vga_write_vbe(VBE_DISPI_INDEX_ENABLE, vbe_enable);
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let vbe_enable = vga_read_vbe(VBE_DISPI_INDEX_ENABLE);
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println!("VBE Status: {:04x}", vbe_enable);
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vga_write_vbe(VBE_DISPI_INDEX_ENABLE, vbe_enable | VBE_DISPI_ENABLED);
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println!("QEMU STDVGA driver initialized @ {:x}", vga_base);
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